As much as 96 Cores With 1P and 2P Options

Whereas AMD’s portfolio of embedded merchandise would not obtain fairly as a lot consideration because it ought to, it isn’t a product lineup to be underestimated. AMD’s “fourth platform” covers a surprisingly wide selection of chips for embedded gadgets and purposes, starting from miniscule chips for industrial computer systems and edge gadgets, all the best way as much as mighty EPYC processors designed for top throughput workloads. It is the latter that AMD is specializing in as we speak, as Embedded World 2023 kicks off. A key fixture within the international commerce present season for highlighting and releasing embedded and IoT options, AMD is utilizing the present to unveil its EPYC Embedded 9004 collection, its subsequent era of embedded processors based mostly on its extremely environment friendly Zen 4 microarchitecture.

Derived from AMD’s customary EPYC 9004 chips for servers, the AMD EPYC Embedded 9004 processors are aimed toward embedded purposes resembling automation, telecommunications, the Web of Issues (IoT), and edge computing; use instances the place excessive energy effectivity is a strict technical requirement. Coming with choices in each 1P and 2P configurations, AMD’s EPYC Embedded 9004 collection processors characteristic as much as 96 cores (192 threads) per chip, with as much as 384 MB of L3 Cache and duodenary (12) channel reminiscence controllers, that are able to supporting DDR5-4800 ECC reminiscence in RDIMM, NVDIMM-N, and 3DS RDIMMs flavors.

AMD EPYC Embedded 9004 Sequence: As much as 96 Cores, as much as 400 W cTDP

AMD’s EYPC Embedded processors are deployed for numerous purposes and industries. Some of the profound use instances contains the economic automation business, the place massive computing energy is required and may subsequently course of massive quantities of knowledge in actual time. Different industries requiring high-powered and extremely environment friendly embedded options embody the medical imaging business, edge computing, networking, and telecommunications.

Two vital necessities for embedded options are energy effectivity and efficiency per watt, which is why the newest EPYC embedded 9004 chips should be match for goal. Constructed upon AMD’s not too long ago launched “Genoa”  EPYC 9004 server processors, AMD has assembled ten new SKUs for the embedded market, specializing in delivering modern efficiency whereas sustaining unparalleled efficiency to energy effectivity. The majority of those elements ought to look acquainted to common EPYC customers – most of the SKUs are basically embedded-class variations of present EPYC 9004 elements, with the extra options and availability ensures that being an embedded-class product entails.

General, the AMD EPYC Embedded 9004 stack consists of six 2P processors with choices starting from 16C/32T to massive scaled two socket deployments with as much as 96C/192T, which means {that a} single system can deploy an answer with as much as 192 cores with 384 threads. These 2P techniques, which require extra PCIe 5.0 lanes, may also be configured with base fashions of as much as 16C/32T (EPYC 9124), 24C/48T (EPYC 9254), in addition to 32C/64T (EPYC 9354), 48C/96T (EPUC 9454) and 64C/128T (EPYC 9554) might be deployed in twin socket SP5 options.

Digesting the AMD EPYC Embedded 9004 collection for single socket purposes, there are 4 1P SKUs out there. The entry-level mannequin for single SP5 socket platforms is the EPYC 9354P with 32 x Zen 4 cores with 48 threads, a base frequency of three.25 GHz, and a 1T turbo of as much as 3.8 GHz. The EPYC 9354P has 256 MB of L3 cache, with a base TDP of 280 W and a cTDP between 240 and 300 W. There’s additionally a 48C/96T mannequin (EPYC 9454P) and a 64C/128T mannequin (EPYC 9554P) out there, with all 1P SKUs exterior of the EPYC 9654P (96C/192T) coming with 256 MB of L3 cache.

Based mostly on the Zen 4 microarchitecture constructed on TSMC’s 5nm N5 course of node, every Core Advanced Die (CCD) can accommodate as much as eight Zen 4 cores, with 1 MB of L2 cache per core (8 MB per CCD), with as much as 32 MB of L3 cache per CCD. The highest SKUs within the line-up are the EPYC 9654 and EPYC 9654P, which characteristic 96 x Zen 4 cores with a complete of 384 MB of L3 cache out there. Each 96C/192T EPYC Embedded 9654 chips characteristic a base TDP of 360 W however might be configured for as much as 400 W; the bottom is 320 W, the place massive core clusters are wanted however the place energy restrictions may have to use.

AMD EPYC Embedded 9004 Sequence Options: PCIe 5.0, Reminiscence Assist, Safety, and Software program

The only socket (1P) EPYC 9004 embedded SKUs characteristic 128 x PCIe 5.0 lanes, however twin socket (2P) options might be configured to accommodate as much as 160 x PCIe 5.0 lanes. This enables techniques requiring extra storage gadgets and add-in playing cards might be deployed, together with accelerators, discrete graphics, and networking. AMD is utilizing a TSMC N6 (6 nm) IOD working because the chips plexus, which reduces the general price of deployment as a result of exterior chipsets aren’t a operate requirement. In response to AMD, the central IOD gives “ample” I/O connectivity, together with further ASICs or controllers to be put in for added flexibility.

Regarding reminiscence compatibility, all EPYC Embedded 9004 SKUs can help as much as DDR5-4800 ECC reminiscence, with RDIMMs, 3DS RDIMMs, and distinctive to embedded lineup, NVDIMMs, all supported. All of the chips help twelve-channel reminiscence, though they provide reminiscence interleaving with 2, 4, 6, 8, 10, and 12-channel capabilities relying on the reminiscence density necessities. Every reminiscence channel can help two DIMMs, with a most yield of as much as 6 TB per socket. AMD states that every socket can help as much as 6 TB, so dual-socket SP5 with EPYC Embedded 9004 techniques can accommodate 12 TB.

Some particular embedded options embody Non-Clear Bridging (NTB), which connects a number of processors with excessive bandwidth and high-speed communication through PCIe lanes and gadgets. Sometimes utilized in HPC and different excessive availability techniques, the non-transparent factor permits the EPYC Embedded 9004 CPUs to speak as in the event that they had been mixed bodily and never logically. AMD makes use of its Scalable Information Material (SDF) to interconnect the CCDs with the IOD and reminiscence interfaces. On the similar time, the Scalable Management Material (SCF) permits a configurable entry path to all of the blocks on the chip.

AMD’s Safe Processor know-how, together with options like Safe Boot, is constructed into the die. Safe Boot helps SME-MK (reminiscence) and SEV-MK (virtualization) applied sciences permitting hardware-level reminiscence and virtualization encryption. The added help of Twin SPI permits prospects to make use of a propriety boot loader to authenticate and validate the system BIOS.

As beforehand famous, the EPYC Embedded lineup additionally brings with it official help for NVDIMMs. Particularly AMD EPYC Embedded 9004 helps NVDIMM-N reminiscence (DRAM DIMMs with on-DIMM flash reminiscence backup) to reinforce server uptime and state restoration. NVDIMM-N combines the advantages of typical non-volatile reminiscence with NAND flash reminiscence built-in into it as a fail-safe.

DDR5 NVDIMM-N structure diagram (supply SNIA)

One of many major benefits of NVDIMM-N over different forms of NVDIMMs is its quick entry time. Since DRAM is the first reminiscence, NVDIMM-N gives high-speed entry to knowledge, which is essential for purposes that require quick knowledge entry, resembling databases and real-time analytics. With the the non-volatile flash storage out there as a backup mechanism, NVDIMM-N can be certain that knowledge not misplaced even throughout an influence failure or system crash. NVDIMM-N additionally has a decrease latency than conventional non-volatile reminiscence, which signifies that knowledge might be accessed faster, even at full load, for vital industries resembling Cloud storage, Networking, and Telecomms, and even in sectors resembling Automotive; all of those are key goal segments for the AMD EPYC Embedded 9004 options.

And, after all, AMD’s first era of CXL help is out there as nicely. With full CXL 1.1 help, Embedded EPYC processors can entry risky and non-volatile CXL.mem gadgets, increasing the quantity and forms of reminiscence choices out there to the platform.

AMD EPYC Embedded 9004 Sequence Availability and Deployment

Two of AMD’s key prospects and integrators of its Embedded options embody Siemens and Advantech, with each corporations at present providing options to their prospects. Siemens’s newest SIMATIC IPC RS-828A server is one such deployment that focuses on numerous workloads, together with automotive manufacturing, 5G base stations, and public clouds for IoT options.

Advantech additionally has the newest ASMB-831 server board for the discharge of the EPYC Embedded 9004 collection processors, with an HPC-7485 4U rackmount. The ASMB-831 options 5 PCIe 5.0 x16 slots and two PCIe 5.0 x8 slots able to housing 4 double-decked playing cards with help for DDR5-4800 ECC RDIMMs, and 6 slots with a most capability of as much as 384 GB.

The AMD EPYC Embedded 9004 Sequence is out there for sampling, whereas manufacturing shipments are anticipated to start in April 2023. AMD states that analysis kits with a reference board, detailed documentation, and gear kits can be found now however to certified prospects solely. Lastly, as these are embedded-class merchandise, AMD is guaranteeing as much as 7 years of deliberate availability for his or her EPYC Embedded 9004 processors, which means that alternative chips shall be available proper as much as the following decade.